Regarding PLL_CLKOUTp & PLL_CLKOUTn pins in Cyclone FPGA -IV E series

To use the pin as general I/O use Quartus' pin planner to assign the pin to a signal in your design. Depending on the I/O standard you require you will be able to use both PLL_CLKOUTp & PLL_CLKOUTn pins independently for single ended I/O standards. If using a differential I/O standard you will only be able to assign a signal to PLL_CLKOUTp. PLL_CLKOUTn will automatically be assigned.

To use as a dedicated PLL clock output you will need to instantiate a PLL in your design. I recommend you use Quartus' MegaWizard to create the PLL. Once you have put this in your design you will, again, be able to use the pin planner to assign the required pin to an output of the PLL.