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Altera_Forum
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7 years ago

ref. design of S10 with a PCIe enabled 256-bit bursting slave interface (HPTXS) Port

Hello all, please suggest me a reference design on stratix 10 board with a PCIe , enabled high performance burst interface (HPTXS) port of 256 bit width. I searched on the net to have a c...
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Altera_Forum
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7 years ago

Hi Anil,

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1. can i enable this HPTXS port irrespective of "enable DMA" option that is used to do dma transfers from host to fpga ?

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Yes, Refer User guide.

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2. once i enable this HPTXS port , i have to select - no. of pages and size of each page (on what basis should i select these two parameters) ?

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Refer Session 7.2.1.2 https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_s10_pcie_avmm.pdf

(address + 32 * burst count) <= (page base address + page size )

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)