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Altera_Forum
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16 years ago

Reduce Clock Setup and Clock Hold times

Hi there, I have a state machine witch makes some math operations. The question is how can I reduce the clock setup and hold times, so I can meet my timing requirements? Here is the code of the st...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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Hi VT,

did you write your arithmetic functions by yourself ?

Kind regards

GPK

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The math functions are asynchronous, generated by Altera's MegaWizard Plug-In.

By the way what does the following warning mean: 

    Warning: Synthesized away the following LCELL buffer node(s):
        Warning (14320): Synthesized away node "math_mult:math_mult_inst|lpm_mult:lpm_mult_component|mult_k3n:auto_generated|le10a"
        Warning (14320): Synthesized away node "math_mult:math_mult_inst|lpm_mult:lpm_mult_component|mult_k3n:auto_generated|le10a"
...
Thanks,

VT