Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Read .txt file in verilog and use it in a test bench

This is my first post in this forum, so, firts of all, hello everyone! I'm an italian student, working on my thesis with an altera DE2 board.

I'll explain you what's my problem. I'm not familiar with C language, probably that's why i'm having such troubles.

I want to create a test bench for my project; the input of my project is an 8bit variable (let's call it D from now on). I have a Matlab-generated .txt file, which contains 4096 decimal numbers, variable between 0-255. Now, i want to assign sequentially these values to D, in order to have a value per clock period.

Can you help me to sort this out? Thanks for a reply!
No RepliesBe the first to reply