ContributorHi,
Here is the link to the Hello World Design Example flow for your reference:
http://www.ee.nmt.edu/~erives/531_14/tt_my_first_nios_sw.pdf
Hope this could help/
Thank you.
Regards,
Kelly
Frequent ContributorHi,
Greetings and welcome to Intel's forum.
I have here a few projects for you to try out for beginners:
1)You may check out table 3 Intel Arria 10 Downloadable content like the Board Test System so you are familiar with the board hardware architecture and ensure it runs:
https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/arria/10-gx.html
2)You could try the Board Update Portal Example Design which is to bring up an IP address on the board where this design consists of a NIOS II processor:
https://www.intel.com/content/www/us/en/docs/programmable/683553/current/board-update-portal.html
3) I also have a Hello World which applies for Arria 10 Soc for your reference for you to see the flow of how to create a working NIOS Software and Hardware project but it might not be able to apply for your Arria 10 GX DevKit.
Feel free to head to our FPGA Design Example Store to find out any design examples that you might be interested: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-examples-overview.html
Hope you could explore about NIOS II and looking forward to your feedback.
Thank you.
Regards,
Kelly
ContributorHi Kelly,
2)You could try the Board Update Portal Example Design which is to bring up an IP address on the board where this design consists of a NIOS II processor:
https://www.intel.com/content/www/us/en/docs/programmable/683553/current/board-update-portal.html
While I am open the example with a 21.3 Quartus Pro. after I Open the IP for upgrade. I got the following error message.
Info: Platform Designer Tip: Please Sync All System Infos before attempting to resolve the following error messages
Error: a10_fpga_bup.sgdma_rx: Component altera_avalon_sgdma 15.1 not found or could not be instantiated
Error: a10_fpga_bup.sgdma_tx: Component altera_avalon_sgdma 15.1 not found or could not be instantiated
Error: a10_fpga_bup.sgdma_tx.m_read: Data width must be of power of two and between 8 and 4096
Error: a10_fpga_bup.sgdma_rx.m_write: Data width must be of power of two and between 8 and 4096
Error: a10_fpga_bup.sgdma_rx.descriptor_read: Data width must be of power of two and between 8 and 4096
Error: a10_fpga_bup.sgdma_tx.descriptor_read: Data width must be of power of two and between 8 and 4096
Error: a10_fpga_bup.sgdma_tx.descriptor_write: Data width must be of power of two and between 8 and 4096
Error: a10_fpga_bup.sgdma_rx.descriptor_write: Data width must be of power of two and between 8 and 4096
Error: a10_fpga_bup.sgdma_tx.csr: Data width must be of power of two and between 8 and 4096
Error: a10_fpga_bup.sgdma_rx.csr: Data width must be of power of two and between 8 and 4096
do I have to install a quartus version like 15.1? it is really painful to keep all the history Quartus version on my PC.
I have learned how to build a Nios II and load it through a cable to the FPGA, what I want to know is how to burn the Nios program to A10 dev kit board flash. I am reading "edh_ed_handbook-683689-666980" chapter 5.
I hope there is an example could show the procedure clear and simple.
to make my question clear, is there a tutorial to show the procedure to load NiosII program to flash and boot it successfully from there.
Thank you,
David
