Rbf jic issue

Hi Anand,

Thanks for your reply.

MSEL is setting is as follows:

MSEL3-0 MSEL2-0 MSEL1-1 and MSEL0-0

Is there any difference between active serial and passive serial mode?

We are using rbf file to update fpga and not rpd file.

I tested by generating rbf and jic from same sof file.

Jic is working fine.But with rbf fpga is not configuring.

We have noticed one more finding. In the rbf if I change the data bytes at locations 0x45,46,47,48 and 49 as per jic. FPGA boots up with new image.