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Altera_Forum's avatar
Altera_Forum
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15 years ago

Question on slave SPI function

Hi, I am fairly new writing Verilog and was wondering if Altera offers a IP module to do SPI communications? I am doing a project for myself where I need to load and control four different counte...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Have you checked the SOPC?

There is "SPI Slave to Avalon Master bridge"

So you have use your external CPU and the CPU can control FPGA via SPI bus.

You still should be able to use SOPC builder in CPLD.