Altera_Forum
Honored Contributor
Honored ContributorQuestion about Monitor
Hello, is it possible to synthesize the "monitors" on the altera fpgas'. There are Monitor IPs such as Avalon MM Monitor. Can I synthesize such "Monitors"?
Forum Discussion
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- How will I know if they are attached to physical pins? It is my own module. --- Quote End --- Don't call them pins then. If they are the signals at the top-level of the component, they would be called ports. --- Quote Start --- This module is a sub-module and only the clock pins go all the way to the top. This module has some ports that connect the other modules. For some reason, the bidirectional pins get assigned to a random pins. The input pins and output pins can be declared as virtual pins, but I have problem assigning the bidirectional ones. --- Quote End --- Huh? This makes no sense. You cannot have only the clock pins going to the top module, and then talk about bidirectional pins getting connected. What bidirectional pins? You just stated there were only clocks!? --- Quote Start --- When I look at the pin planner, I don't see these pins having any particular pin location !?!! However the pin location is shown in the Fitter synthesis report. I don't know what's going on[wrong]. --- Quote End --- The only thing that should connect to pins on the FPGA are ports on the top-level entity. Please try to clarify what you are doing. I know its confusing, but it helps if you are clear on what is wrong. Cheers, Dave
