Forum Discussion
Altera_Forum
Honored Contributor
15 years agoGood Morning Dave,
After designing the PCIe DUT system, there are two things I can do, a) In the Qsys generation tab select the "Standard, BFMs for standard Avalon Interfaces" and the qsys will attach appropriate BFM's to the PCIe IP. b) create another qsys system for PCIe BFM and connect them together using conduits I think that connecting the conduits makes the testing of my PCIe DUT feel more real [like connecting the conduits feels like that the signals are actually coming from the outside of the FPGA], Is this the only difference ? Thanks Dave.