Altera_Forum
Honored Contributor
Honored ContributorQuestion about Monitor
Hello, is it possible to synthesize the "monitors" on the altera fpgas'. There are Monitor IPs such as Avalon MM Monitor. Can I synthesize such "Monitors"?
Forum Discussion
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Yes, even the video tutorial showed that PCIe can be configured as Native endpoint, root port and Legacy Endpoint [but this was done in the Mega Function Wizard]. When I edit the component in Qsys, those options don't show up! --- Quote End --- What you see in Qsys is defined by the _hw.tcl file for the IP component. Its quite possible Altera has not defined the Qsys view with all the features available from the MegaWizard component. If that is the case, then just use the MegaWizard to define the component, and from Qsys generate an _hw.tcl file that implements an Avalon-MM master interface that does not include it in the Qsys system. This will then result in a top-level Qsys design with master ports that you can externally connect to the PCIe block generated via the MegaWizard. Cheers, Dave
