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Altera_Forum
Honored Contributor
15 years agoOh!, ok.
This is where I got stuck!. as my first exercise: I connected the Avalon Master BFM to the slave of RAM [Then I used API to write to the RAM].This was a useless exercise. as my second exercise: I connected bar1_0 [Avalon master in the PCIe IP] to the slave [s1] of RAM and wrote data to the ram. This I did by using the write tasks given in the manual. as my third exercise[got stuck] I wanted to do exactly what you are saying but got stuck. Okay I will start implementing what you just described. Step One: Adding IP's a) [1: number of components] Avalon MM Master BFM. b)[1] PCIe IP.[contains two slaves and one master] c) [1] on-chip RAM. [contains one slave] Step two: Connecting IP's a) Connect [m0] of the Avalon Master BFM to the the Avalon slave of PCIe [there are two slaves, CRA (Control register Access) and Tx_interface], I will connect to the CRA -------------------------At this point I will have a PCIe BFm right?------------------------- b) Connect the Avalon master of PCIe [bar0] to the slave [s1] of RAM. ------------------At this point is my design complete ?------------------------------------- Questions: a. Should I export any pins ? Thanks, Aditya