Forum Discussion
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- The diagram is drawn with an extra clock cycle between the read and the write for clarity only. If the slave design is yours, you will have to correct it. You should at least be able to accept back-to-back writes or reads, going from read to write or vice versa without that extra clock cycle shouldn't pose a problem either. --- Quote End --- Thanks for the suggestion.Josyb. will change my slave code.