Quartus II- ALTPLL and ALTPLLCONFIG megafunctions

I've seen this example before I created my own design. The issue is another: 1). I'm changing C0 parameters by writing DATA_IN value into Counter_param( High_Counter and Low_Counter ) of C0 on the rising edge of write_param. 2). Then I'm changing C0 parameters by writing DATA_IN value into Counter_param( High_Counter and Low_Counter ) of C1 on the rising edge of write_param. 3). Then I'm making reconfiguration by rising RECONFIG for 1 clock period. All these actions I'm executing in the Test Bench. Then I'm making a simulation for some period of time and the problem begins: The parameters of C0,C1(High/Low counters) are different from the ones I wrote. Sometimes C1/High counter is different, sometimes something else is different, sometimes one of the counters is bypassed. What is a right order of the writing DATA_IN into counter_param?