Forum Discussion
SteffenP
New Contributor
11 months agoQuartus 25.1.1 Pro Fitter Error with Agilex3
Hi, I have an issue trying to compile Verilog project for a Agilex 3 (A3CZ135BB18AE7S) based development board. The error I'm getting is : Error (23098): One or more blocks are configured incorrec...
SteffenP
New Contributor
10 months agoHi,
To clarify, the workaround is to add a register with a "noprune" attribute that registers the unused bit of the ddrio ibuf to ensure it doesn't get optimized away :
wire ethphy_source_valid; // To CDC wire [1:0] ethphy_rx_ctl; // From IO (* noprune *) reg ethphy_rx_ctl0_reg; always @(posedge eth_rx_clk) ethphy_rx_ctl0_reg <= ethphy_rx_ctl[0]; assign ethphy_source_valid = ethphy_rx_ctl[1];
Cheers,
Steffen