Forum Discussion
Hi,
I think I've figured it out.
The issue is with the ibuf. If the output of the ibuf somehow gets optimized away, we get this warning. For example I've reduced my example down to a single bit of ibuf and obuf (the CTL part of my original code).
If I do it like this :
wire ethphy_sink_valid; // From CDC wire [1:0] ethphy_tx_ctl; // To IO assign ethphy_tx_ctl = {2{ethphy_sink_valid}}; wire ethphy_source_valid; // To CDC wire [1:0] ethphy_rx_ctl; // From IO assign ethphy_source_valid = ðphy_rx_ctl; ipm_cdc_2clks_sync u_ctl_sync (.src_clk (eth_rx_clk), .src_sig (ethphy_source_valid), .dst_clk (eth_tx_clk), .dst_sig (ethphy_sink_valid) );
it works fine, no error.
However, if I do it like this :
wire ethphy_sink_valid; // From CDC wire [1:0] ethphy_tx_ctl; // To IO assign ethphy_tx_ctl = {2{ethphy_sink_valid}}; wire ethphy_source_valid; // To CDC wire [1:0] ethphy_rx_ctl; // From IO assign ethphy_source_valid = ethphy_rx_ctl[1]; ipm_cdc_2clks_sync u_ctl_sync (.src_clk (eth_rx_clk), .src_sig (ethphy_source_valid), .dst_clk (eth_tx_clk), .dst_sig (ethphy_sink_valid) );
It fails with this error.
The difference between the two is that in the second case only one of the two output bits from the DDRIO register is used in the CDC transfer (bit[1]), so the other gets optimized away by the compiler. And then the fitter throws this error, which could have been a bit more clear to be honest
Even adding a register stage to register both bits doesn't work, because the register for the unused net ultimately gets optimized away.
This happens regardless of using the GPIO IP or the atom primitives directly.
Now I have a workaround for my specific case at least, but it would be nice if the tool either gave a more clear error on what went wrong, or actually managed to deal with it anyway (either by adding it's own set of register preservation or removing the unused instance).
Cheers,
Steffen
Cheers,
Steffen