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syam's avatar
syam
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Quartus 18.1 - CYCLONE V Preloader issue

Hi Am working on a project with CYCLONE V - 5CSXFC6D6F31C8N with Quartus 18.1. After compilation in emif.xml file in the hand off folder the SDRAM related clock info is being written as 0 by quart...
aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi syam,


In U-boot, type help.

Check if there is command bridge and clocks in the help list?

If there is command bridge, type bridge enabled.

Type clocks to show the available clock infos.

Compare the clock infos with those infos shown during the preloader boot up.

Can re-try the above steps without bridge enabled as well to notice any difference.


I recommend using the booting up process with the document in my previous comment instead:

https://rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10#Cyclone_V_SoC_45_Boot_from_SD_Card

The U-boot version that you are using is from 2013 version.



Thanks.

Regards,

Aik Eu


  • syam's avatar
    syam
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Hi Aik

    We are using the preloader/uboot source code that shipped with Quartus 18.1. So I would assume this one is correct.

    We have a .scr file on the SD card that enables the bridge you are talking about.

    We will inspect the frequency shown on uboot log and revert with our findings.

    • syam's avatar
      syam
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Hi Aik

      Here is the bootlog attached. The bridges seems to be registered.

      Note that we are able to boot in to Linux. But we are unable to use the 50Mhz from FPGA to run the SDRAM.