Forum Discussion
Jcole
Occasional Contributor
2 years agoProgramming S25FL256 through Cyclone 10 with file from Processor
Hi, I wanted to see if it is possible to load a S25FL256 with a Programming File (.rpd, .pof, .sof, etc) through the Cyclone 10 LP using a file received from the processor. Essentially what I'm t...
- 2 years ago
Hi,
signaltap waveform shows that you don't understand Avalon MM timing requirements. We see e.g. mem_read active while mem_ waitrequest is asserted which must never happen.
Imagine that mem_write starts a serial flash cycle with adress and data bits. Waitrequest indicates ongoing serial interface activity, next memory read/write can't happen before waitrequest is release. Similar problems exist with csr interface.
FakhrulA_altera
Regular Contributor
2 years agoHi Jcole,
Maybe you can start with Intel® Cyclone® 10 LP FPGA – Remote System Upgrade with System Console Design Example.
Here is the user guide for your reference: Reference guide for the design example
Regards,
Fakhrul