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From what I'm reading about JRunner and JAM STAPL is could be possible to code or modify my own version.
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Porting the Jam player is pretty simple. I use it for programming EPC2 EEPROMs (used with FLEX10K FPGAs), and for programming MAX II CPLDs.
Porting the Jam player basically involves supplying toggle I/O routines for controlling the JTAG pins.
While this gives you the ability to (slowly) program the FPGA, it does not give you convenient access to the SignalTap II logic analyzer.
One way to look at your system design, is to consider what is needed for operation, and what is needed for debug. In my systems, I have generally used PS and FPP for configuration of the FPGAs, and then plugged a JTAG cable in when needing to debug. For example;
http://www.ovro.caltech.edu/~dwh/carma_board/ (
http://www.ovro.caltech.edu/%7edwh/carma_board/)
However, for really tricky bugs that occur infrequently and randomly across multiple boards (eg., on one board out of 100+), plugging a JTAG cable into all of them is not an option. In the new system I am designing, I will have both a 'fast' programming method (FPP) and a debug method (eg., SignalTap II via JTAG). I also need a low- to medium-speed communications mechanism (for control commands) between the host and the FPGA. With these requirements in mind, I'm looking at using the FT2232H as both a USB-Blaster clone (so that Quartus recognizes it), and as a USB-to-parallel communications channel (20MB/s for the FT2232H in synchronous mode). I'm currently working on the documentation/test results now, I'll post it when its done.
Cheers,
Dave
Honored Contributor
