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Honored Contributor
Honored ContributorProblem with Triple Speed Ethernet sdc file
I met a problem where I compiled my design with the TSE IP core. The sdc file generated with the core use get_ports in the create_clock command. But my design instantiated the IP in my desig...
Altera_ForumHonored Contributor
Honored ContributorI'm not certain, but starting to suspect that the sdc file generated for the TSE MAC IP needs to be updated to follow the advice at this link, so that it will function properly in hierarchical system such as might be produced in QSYS, but maybe that update hasn't occurred yet?
http://www.altera.com/support/examples/timequest/exm-tq-reusable-clock-sdc.html
