Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Problem with FIR II core

Hello, I am trying to use 11 taps symmetrical FIR using the IP Catalog in Quartus 14.1 My data are in signed Q.15 format with sampling rate 288MHz. I get the data in packets of 4 samples (...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

--- Quote Start ---

OK Now I have 288MHz clock to my FIR filter but I seems to get issues with it.

I have verified that filter 'valid' signal is constant 1 and filter output error[1:0] is 2'b00

Is this a confirmation that the filter manages to do its calculations on time?

What is to be expected if the clock reaches the filter maximum performance speed?

Thanks

Dimitar

--- Quote End ---

vin should be continuously high (by your input mux). vout will then be continuously high(by filter). It is single rate so both input and output are running on 288Mhz which is your data rate.

Your question on filter maximum speed implies some uncertainty of your thoughts here. can you explain it further.