Problem with FIR II core

--- Quote Start ---

Hi kaz,

In the mega wizard for the FIR I specify:

- Clock Rate 72

- Input Sample rate (MSPS) 288

As per the documentation this enables the FIR to work in TDM mode.

In the generated interface module for the FIR I have checked that inputs and outputs become 64bit.

What I am not clear is if this TDM mode consider those 4 samples as one signal or as 4 independent signals.

Obviously I want to implement only one channel with one signal stream (getting it in a 4 samples chunks)

If what I am doing is not OK, what is the proper way this to be done?

Apart of the obvious splitting of the 4 samples, clocking the FIR at 288MHz and then combining the output data in 4 sample chunks.

Thank you.

Dimitar

--- Quote End ---

either use 4 parallel input paths (1 channel per path) or use 4 channels and pass 16 bits data samples serially (s1=> s2=>s3=>s4)