Forum Discussion
Altera_Forum
Honored Contributor
17 years agoThank you both; pletz and FvM for your help, I have slightly modified pletz code and got it to work exactly the way I wanted. Lookin both of your sugestions has given me a little more insight as to what I need to do. I was actually trying to make a simple variable pulse generator as part of a learning project for both the quartus tool and the verilog hdl.
You are right FvM, regarding the Gate signal it has to be synchronized with the clock and the gate time must always be >> than the one shot pulse in order for thing to work correctly.