Forum Discussion
Altera_Forum
Honored Contributor
17 years ago --- Quote Start --- Hi, you got this error, because you are driving "temp" in two processes. Would you like to achieve a counter, which starts counting at a rising of the signal "gate", then counts up to a certain value and then stops ( setting the counter to "0")? --- Quote End --- Hi, I wrote an example for you, which maybe fits to your requirements. module PulseWidthCounter(clk,CountVal,Gate,PulseOut,reset); parameter SIZE = 20; input clk; input Gate; input CountVal; input reset; output PulseOut; reg CounterVal; reg clk1; reg PulseOut; // posedge detection of signal Gate reg temp; wire p_edge; always @(posedge clk) begin if (reset) temp <= 0; else temp <= Gate; end assign p_edge = Gate & !temp; // posedge detection // Counter always @(posedge clk) begin if(reset) begin CounterVal <= 0; PulseOut <= 0; end else if (p_edge) begin CounterVal <= CountVal; end else if (CounterVal > 0) begin CounterVal <= CounterVal - 1; PulseOut <= 1; end else begin CounterVal <= 0; PulseOut <= 0; end end endmodule With the reset signal you set the counter and the PulseOut to "0". That is useful especially for simulation, because you can bring the circuit to defined state. There is a edge detection build in, which detects the pos edge of the signal "Gate". In case of the edge the counter is load to the value defined by input "CountVal". The load pulse is only one clock cycle long. After that the counter counts down as long as the counter value is > 0 and the PulseOut signal is set to "1". At "0" the counter stops and the PulseOut is set to "0". Maybe this is a good starting point for you. Simulate the design and try to understand what I did.