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Altera_Forum
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15 years ago

Problem using DDR3 bottom port with StratixIV EP4SGX230KF40C2

Hi, I'm trying to introduce with SOPC_BUILDER the DDR3 64 bits in my design, that also includes NIOS 2 and flash. Analysis and synthesis go well, but when I try to run the hello_world test on...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

So now it is clear that the issue is on DDR3 bot.

Have you tried the BTS GUI and run the DDR3 test on it?

If it does not work for the bot, then it will be the board issue.

If it runs, then your design has something wrong.

You should be able to copy the DDR3 setting from the bts example design.

If you are using Q10.0 or newer, then you need to add few new setting in order to make it work correctly. I think Q9.x does not have tFaw and few more.