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Altera_Forum
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15 years ago

Problem using DDR3 bottom port with StratixIV EP4SGX230KF40C2

Hi, I'm trying to introduce with SOPC_BUILDER the DDR3 64 bits in my design, that also includes NIOS 2 and flash. Analysis and synthesis go well, but when I try to run the hello_world test on...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I also tried to move to Quartus 10.1 with no results, no hello_world! :cry:

Does anyone know where I can find a reference design instantiating both NIOS and DDR3 64bits in SOPC?

Thanks

ALA