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It seems like you have an issue on Flash interface.
You might want to double check it. Since you set the reset vector on flash, CPU will try to access flash.
Also, I'm not sure about "no output". It you are saying no stdout, then check if you have jtag-uart in your SOPC and connected correctly. Then, check in the NIOS2 SBT or IDE that your software project is properly assigned the jtag-uart for stdout or stderr.
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Hi,
thank you for the reply.
I do have jtag-uart in SOPC and stdout is correctly assigned.
I attach the screenshots of my project so you can see if something is not well connected, but consider that I started from a reference design with DDR3 top port (16 bits) and modified the parameters for the DDR3 SDRAM High Performance Controller to use bottom port (64 bits).
Note that the program is correctly downloded and verified:
Using cable "USB-Blaster ", device 1, instance 0x00
Pausing target processor: OK
Reading System ID at address 0x480020D8: verified
Initializing CPU cache (if present)
OK
Downloading 20000120 ( 0%)
Downloading 20010000 (98%)
Downloaded 65KB in 0.5s (130.0KB/s)
Verifying 20000120 ( 0%)
Verifying 20010000 (98%)
Verified OK
Leaving target processor paused
but it seems it can be started and the memory is not accessible with the debugger.
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