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Altera_Forum
Honored Contributor
15 years agoProblem using DDR3 bottom port with StratixIV EP4SGX230KF40C2
Hi, I'm trying to introduce with SOPC_BUILDER the DDR3 64 bits in my design, that also includes NIOS 2 and flash. Analysis and synthesis go well, but when I try to run the hello_world test on...
Altera_Forum
Honored Contributor
15 years agoIt seems like you have an issue on Flash interface.
You might want to double check it. Since you set the reset vector on flash, CPU will try to access flash. Also, I'm not sure about "no output". It you are saying no stdout, then check if you have jtag-uart in your SOPC and connected correctly. Then, check in the NIOS2 SBT or IDE that your software project is properly assigned the jtag-uart for stdout or stderr.