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Altera_Forum's avatar
Altera_Forum
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16 years ago

Problem on writting

Hi guys, I'm tryining to write on my own controller that communicates through avalon bus.

I'm debuggin my small program from NIOS II EDS and when the line is executed

IOWR(DUMMY_0_BASE,0,Tmp1);

this errors appears :

assertion "m_state == STATE_DEBUG" failed: file "nios2debug.cpp", line 286

C:\altera\81\nios2eds\bin\nios2-download: line 594: 5444 Aborted

(core dumped) nios2-gdb-server --instance 0 --tcpport auto --write-pid Debug/n

ios2-download.pid

Anyone knows why this is occuring ? ( The address it's correctly on system.h file)

Thank you for any help :-)

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Hmmm. Check your system.h file and make sure that the macro "DUMMY_0_BASE" matches the based address of your component in SoPC builder. Actually can you post a screenshot of your SoPC system?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    this is the error what i get

    Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

    Processor is already paused

    Reading System ID at address 0x20000088: verified

    Initializing CPU cache (if present)

    OK

    Downloading 10000120 ( 0%)

    Downloaded 42KB in 0.5s (84.0KB/s)

    Verifying 10000120 ( 0%)

    Verified OK

    Starting processor at address 0x100002B4

    assertion "m_state == STATE_DEBUG" failed: file "nios2debug.cpp", line 563

    /cygdrive/c/altera/10.0sp1/nios2eds/bin/nios2-download: line 601: 18396 Hangup nios2-gdb-server --cable 'USB-Blaster on localhost [USB-0]' --device 1 --instance 0 --sidp 0x20000088 --id 0x0 --timestamp 1307681075 --go --tcpport none --write-pid /cygdrive/d/BMSCE/MMCAS/10thJune2011/DDR3/software/hello_ddr3/nios2-download.pid d:/BMSCE/MMCAS/10thJune2011/DDR3/software/hello_ddr3/hello_ddr3.elf.srec

    please suggest me the solution

    Hi,

    What changes should be done to meet DDR3 Timing requirements if I am migrating my project from use of EP2AGX125EF35c4 as FPGA to EP2AGX125EF35i5 as FPGA ?

    http://www.alteraforum.com/forum//proweb/buttons/quote.gif (http://www.alteraforum.com/forum/newreply.php?do=newreply&p=121727)
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    this is the error what i get

    Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

    Processor is already paused

    Reading System ID at address 0x20000088: verified

    Initializing CPU cache (if present)

    OK

    Downloading 10000120 ( 0%)

    Downloaded 42KB in 0.5s (84.0KB/s)

    Verifying 10000120 ( 0%)

    Verified OK

    Starting processor at address 0x100002B4

    assertion "m_state == STATE_DEBUG" failed: file "nios2debug.cpp", line 563

    /cygdrive/c/altera/10.0sp1/nios2eds/bin/nios2-download: line 601: 18396 Hangup nios2-gdb-server --cable 'USB-Blaster on localhost [USB-0]' --device 1 --instance 0 --sidp 0x20000088 --id 0x0 --timestamp 1307681075 --go --tcpport none --write-pid /cygdrive/d/BMSCE/MMCAS/10thJune2011/DDR3/software/hello_ddr3/nios2-download.pid d:/BMSCE/MMCAS/10thJune2011/DDR3/software/hello_ddr3/hello_ddr3.elf.srec

    please suggest me the solution

    Hi,

    What changes should be done to meet DDR3 Timing requirements if I am migrating my project from use of EP2AGX125EF35c4 as FPGA to EP2AGX125EF35i5 as FPGA ?

    --- Quote End ---

    Has this error been solved? Could you pls share how you solved it?