problem about por

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but my reset chip max708s has only 200ms of power on reset.then after the fpga finish config,it cannot going to reset state , How can I resovle this problem

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Sounds like unsuitable reset logic. External asynchronous resets needs to be synchronized to achieve an synchronous release. This logic logic should also work, if the external reset has ended before configuration.

The MAX708 still works as a power supply supervisory, but you probably may want to use a chip with longer delay.