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Altera_Forum's avatar
Altera_Forum
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15 years ago

Problème programmation Pin

Hello, For the passage of a signal, I use a pin in High Impedance, I declare it with : HZ : out std_logic_vector(11 downto 0); HZ<="ZZZZZZZZZZZZ"; My problem is with...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi,

Look at http://www.alteraforum.com/forum/showpost.php?p=76202&postcount=1 I think it is similar.

I pass signals under ? the CPLD by some pins. Do you mean that HZ pins are connected to your "signals under the CPLD " ?

I declare those pins in HZ for they don't influence the signals.

"don't influence" : It depends of impedance of your signal generator.

Are you sure of your connections CPLD_pin <--> "under CPLD" signals? :-)

Could you give a simple schema of your design {CPLD + extern} ?

Your english is not perfect ;-).