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Altera_Forum
Honored Contributor
Honored ContributorProbability successful in FPGA if done in modelsim!!
How 's the porbability to run successfully a project on real FPGA if I have verified it in simulation using Modelsim? And what makes the difference between modelsim and FPGA in case if it run on ...
Altera_ForumHonored Contributor
Honored ContributorAt risk of stating the obvious, your code must be RTL and may only use the subset of the language that is supported by your synthesis tool. Code written for simulation without regard for synthesis will generally not work in an FPGA.
