PreSICE Avalon calibration

Hi,

Pls see my comment below.

1. Does this work for PLLs that are not connected to transceivers, or is being connected to a transceiver a requirement for PreSICE?

• It still works on PLL that doesn't connect to transceiver which I presume you are referring to fPLL here.

1. The PLL does not assert lock on an eval board, but does lock when connected to a transceiver. When not connected to a transceiver, the pll_powerdown pin is controlled via a register.

• I am not sure about your design on your board but byright PLL lock has no dependency on the connected transceiver channel.
  • The factor that I can think of that may affect PLL lock are PLL refclk and PLL reset

1. When I complete step 3, writing a one to enable calibration - the register clears on write. Is this supposed to happen?

• Yes, it's auto clear as explained in user guide chapter 7.2. Calibration Registers (page 582)
  • All calibration enable registers are self-cleared after the calibration process is completed.
  • https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/ug_arria10_xcvr_phy.pdf

Thanks.

Regards,

dlim