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Rob_XJTAG_ASAP's avatar
Rob_XJTAG_ASAP
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2 hours ago

Preconfiguration BSDL Editor for Agilex 7 with disabled F-Tiles

On a design with an AGIA040R39A some of the FHT are disabled.  We tried to modify the BSDL file using the “Preconfiguration BSDL Editor for Agilex 7 Devices with F-Tiles” as mentioned here: https://d...
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Rob_XJTAG_ASAP's avatar
Rob_XJTAG_ASAP
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1 hour ago

Having looked at the BSDL file generated by the Preconfiguration BSDL Editor, it appears that there are other issues with it because it doesn't generate a valid BSDL file for this FPGA in a number of ways (eg syntax errors, missing cells in the boundary scan register description).