Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

porting code from SRAM to SSRAM, bursting confusion

Hi all, I'm trying to port some code which used an SRAM chip on a DE1 board, to use the SSRAM chip on a DE2-70 board. My main concern and confusion is the fact that SSRAM uses bursting. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

assign SRAM_ADSP_N = ~(is_read);

assign SRAM_CE1_N = 1'b0;

assign SRAM_CE2 = 1'b1;

assign SRAM_CE3_N = 1'b0;

By above modifications, the read pipeline arbitrary addresses with one latency cycle can be achieved.^^.