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Altera_Forum's avatar
Altera_Forum
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16 years ago

porting code from SRAM to SSRAM, bursting confusion

Hi all, I'm trying to port some code which used an SRAM chip on a DE1 board, to use the SSRAM chip on a DE2-70 board. My main concern and confusion is the fact that SSRAM uses bursting. ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

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I've done some testing, and the SSRAM chip I am using is capable of pipelining arbitrary addresses for reads. Just thought to clear it up.

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Hi kwuaker,

It seems this is too old post, but let try.^^.

Could you please show me how to control SSRAM to read pipeline arbitrary addresses ? I did tie 3 SSRAM chipselects fixed values (CS_N1, CS_N3 = 1'b0; CS_2 = 1'b1), but it still can not read pipeline, "a single read must be completed first, before new addresses can be supplied" as you mentioned.

Khai,