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Altera_Forum's avatar
Altera_Forum
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8 years ago

Port number limitation prevents my codes from compiling

I have two questions. What I want to do is : I want to send 144 8bit numbers from my computer to FPGA, and let the FPGA store the numbers in memory in the FPGA. And let the verilog bloc...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

I Looks like you have declared all 144 numbers to be transferred to the FPGA via 1Byte each as separate Inputs (144 x 8 = 1152 I/O pads + (assumed) some control, clock, ...).

If this is the real Hardware implementation you Need a FPGA with enough I/O Pins (I'm quite sure there is no such housing).

If the numbers are to be stored in internal Memory you normally have one 8Bit Port for the numbers and one 8 Bit port for the Memory address the number shall be stored at (2^8 = 255 "locations").

I think you need to re-check your code again...