PMA Direct Transceivers and ATX PLLs

Hi Dave,

Thank you for taking a look at this.

I did see the errata but the errors I'm seeing seem to be related to the difference in the clock settings between PMA direct transmitters and transmitters running in Basic mode. I can use two CMU transceivers within one block of the ATX PLL in PMA direct xN mode and it works fine. If I add two adjacent transceivers on normal channels and put them in PMA direct mode just like the CMU transceivers, that also works. If I run the basic transceivers in basic mode along with CMU transceivers in PMA direct mode, it fails, even if I check the Use ATX pll box in the normal transceiver megafunction. I'd much rather use the hardened transceiver functions where available instead of spending the LEs to implement the PCS in the fabric but it looks like there's a solution at least.

I could have sworn I got it working before but I can't seem to get it to compile now. Taking a closer look at the working CMU transceivers, the transmit clocks are coming from the ATX PLL and the receive clocks are coming from the PLL in bypass mode to drive the CDR. I wonder if this is just the graphic representation in the Chip Planner since the ATX PLL uses the xN clock lines. I'll see if I can at least get both basic and PMA direct receivers to play nice.

Thanks again,

Scott