PLL's in Cyclone V

Hello,

I am trying to use the output of a PLL to drive a logic in FPGA. I'm not sure which clock should be connected as the 'refclk' for the PLL and how the 'outclk' of the PLL should clock my logic.

I have tried using a 50MHz clock (PIN AF_14) as a refclk for the PLL, and used the PLL 'outclk' as a clock input but my logic does produce any output. Could you please help?

Also, when I check my logic in ModelSim, the correct results are obtained.

Thank you.