Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

PLL usage

Hello all, I've noticed that many use PLL on the reference clock input even if they do not need to divide/multiply/shift this clock or do not have external clock to synchronize to the reference fr...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Guarantee huh ... no guarantees. The effectiveness of the PLL at removing jitter depends entirely on the type of jitter in the signal. Obviously the simple answer is to set the bandwidth of the PLL as low as possible.

Your original question was why designs use a PLL to produce a clock of the same frequency as the input clock. The simple answer is that a PLL can clean up the clock (jitter, duty cycle, etc.). Some clock outputs from crystal oscillators can look kind of trashy. Doesn't hurt to run it through a PLL.

Jake