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Altera_Forum
Honored Contributor
Honored ContributorPLL operating range
i am in the need to deskew or multiply the frequency of an input clock whose frequency can vary widely. the application is video where the clock can be coming in LVDS or LVTTL at clock speeds varying...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- which is a bit complex to do and adds latency in the lock acquisition process. --- Quote End --- Complex, yes. Lock delay can be expected with any PLL, also of existing DVI hardware. Shouldn't be a problem, I think.
