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Altera_Forum's avatar
Altera_Forum
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12 years ago

PLL not outputting signal on C IV device

I've been messing around with the DE0 Nano board and then recently took my design and moved it to my own board (my first FPGA board :) ). The HDL on the DE0 nano is the same as the HDL on my board. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

My guess would be a wiring error on the board, or needing more analog PLL supply filtering.

Have you tried to reduce your VCO settings, to see if you can get any output?

Also try to observe the PLL source clock on a output or through signal tap directly.

If you have to much noise on the PLL supplies, they will have difficulties locking, or may loose lock.

If you don't have the source clock, you will never lock.

Pete