Forum Discussion
Altera_Forum
Honored Contributor
9 years ago[PLL IP] missing generated clock
Hi All, I'm receiving the following message during PLL compilation: --- Quote Start --- Warning (332056): Node: i_pmu|i_alt_pll|altpll_component|auto_generated|pll1|clk[1] ...
Altera_Forum
Honored Contributor
9 years agoThis might anwer your question:
https://www.altera.com/support/support-resources/knowledge-base/solutions/rd06092011_472.html