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fogl's avatar
fogl
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

PLL - variable frequency input, constant output (Max10)

Hello everybody, I would like to connect the RGMII ethernet phy to Max10 device. The phy can output clock and data at 25MHz or 125 MHz (depending in the ethernet datarate), and i would like that my ...
fogl's avatar
fogl
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Great, thank you for your suggestion, this seems feasible :)

Just one more question: it may turn out that the constant 125MHz clock is a bit too high for my design. Is there a simple way to divide it without the PLL or should i drive the clock signal through some external discrete flipflop on the pcb?

Regards