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Altera_Forum's avatar
Altera_Forum
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13 years ago

place and route data output

Hello, Given a design in verilog, is it possible to view the routing information of my design on an fpga? What I'm after is placement information (which LE blocks are connected to eacho...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

No there is an option called show physical routing .

It will show you the total hops and how actually the routing was done.

Now even if you want more then during report timing by time quest enable the option show_routing_details and it will show you the whole routing in the timing reports.

Good luck