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Altera_Forum
Honored Contributor
Honored Contributorplace and route data output
Hello, Given a design in verilog, is it possible to view the routing information of my design on an fpga? What I'm after is placement information (which LE blocks are connected to eacho...
Altera_ForumHonored Contributor
Honored ContributorThanks for the reply,
The chip planner tells me too little information about the routing. I require track number and interconnect switch coordinates. Chip planner is fine for LAB location, but for routing, it tells me nothing except for which blocks are connected to eachother.
