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Altera_Forum
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11 years ago

Pin Planner LVDS Differential Pair Selection

I am fighting Pin Planner at every turn. In my QSF file, I have the following: set_location_assignment PIN_T22 -to "HSMC_RX_D_N(n)" set_instance_assignment -name IO_STANDARD LVDS -to "HSMC_RX_D...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

The signals are coming into the FPGA as differential and I have control over the ADC that is attached via the HSMC connector to enable 94 Ohm (and other values) resistors for termination. So, I want to handle single ended signals within the FPGA, so they need to go through a buffer to become single ended, yes?