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dalogan's avatar
dalogan
Icon for New Contributor rankNew Contributor
5 years ago

pin delay data 1SX280LN2F43I2LG

I am looking for the package pin delay data on the 1SX280LN2F43I2LG Stratix 10 FPGA for the High Speed I/O. I need that data to complete proper trace routing on the PWB. I also require any and all ha...
AminT_Intel's avatar
AminT_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hello,

Please refer to these following links:

1. Stratix 10 Device Datasheet: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/s10_datasheet.pdf

2. Stratix 10 GPIO User Guide: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-gpio.pdf

3. Stratix 10 Device Family Pin Connection Guidelines: https://www.intel.com/content/www/us/en/programmable/documentation/lod1484643014646.html#mgd1484643128654

Thank you.