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Altera_Forum's avatar
Altera_Forum
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17 years ago

Pin assignment wrong on ALT2GXB

I've been working on a design project in Quartus and am having some difficulties with assigning pinouts for a Stratix II GX on ALT2GXB.

Error: Can't fit design in device

Error: Can't place input pin "FORWD_GXB_IN[0]" in Pin_AF1 because the pin is not connected to GXB Transceiver logic but the location is GXB Receiver pin.

Error: Can't place input pin "FORWD_GXB_IN[0]" in Pin_AF1 because the pin is not connected to GXB Transceiver logic but the location is GXB Receiver pin.

Error: Can't place input pin "FORWD_GXB_IN[1]" in Pin_E1 because the pin is not connected to GXB Transceiver logic but the location is GXB Receiver pin.

Error: Can't place input pin "FORWD_GXB_IN[1]" in Pin_E1 because the pin is not connected to GXB Transceiver logic but the location is GXB Receiver pin.

Error: Quartus II Fitter was unsuccessful. 7 errors, 4 warnings

Info: Allocated 214 megabytes of memory during processing

Error: Processing ended: Mon Apr 28 21:02:16 2008

Error: Elapsed time: 00:00:03

Error: Quartus II Full Compilation was unsuccessful. 7 errors, 26 warnings

Error: The node "FORWD_GXB_IN[0]" is connected to or is part of a gigabit transceiver that must be placed into region "CUSTOM_REGION_X78_Y0_X78_Y52". However, your location assignment "PIN AF1" is incompatible.

Error: The node "FORWD_GXB_IN[1]" is connected to or is part of a gigabit transceiver that must be placed into region "CUSTOM_REGION_X78_Y0_X78_Y52". However, your location assignment "PIN E1" is incompatible.

I took a look at the pin assignment and the device setting, I found it's correct.

I don't know what's the errors mean? help!

THE PROJECT:

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    The compiler seems to misunderstand the connection of the input "bus". In RTL viever, both inputs appear as being connected to the same signal. Perhaps you should try to connect two individual pins instead of a bus. Could be a Quartus bug.

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Thank you for your reply.

    As you've said, I connect two individual pins instead of a bus, and compile again.

    But the errors exist as before.

    It seems to be not that reason.

    Anybody can provide some suggestion?
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    I had nearly the same problem and the reason was that quartus optimized away my megafunction component because i didn't connect the outputs of the ALT2GXB megafunction to logic and bcause of that my gxb pins weren't connect to a gxb-transceiver.

    So i just declared outputs in top level for testing purposes and connected them and then it worked.

    Maybe that's the reason.

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    If you look at your synthesis report you will find the following warnings: 

    Warning: Synthesized away the following node(s):
	Warning: Synthesized away the following SERDES transmitter or receiver node(s):
		Warning (14320): Synthesized away node "FORWDGXB:inst2|alt2gxb_forwd:inst2|alt2gxb:alt2gxb_component|rx_out_wire"
		Warning (14320): Synthesized away node "FORWDGXB:inst2|alt2gxb_forwd:inst1|alt2gxb:alt2gxb_component|rx_out_wire"

    Your problem is as dewiet pointed out. Your ALT2GXB instances are being synthesized away and Quartus does not allow you to declare transceiver inputs in your design without connecting them.

    Jake