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Honored Contributor
Honored ContributorPHY Ethernet to optics without external chip
Hello! Can anyone tell me, is it possible to create PHY ethernet on my Cyclone IV E using IP core or VHDL/Verilog? I also found "Custom PHY" IP core. Can I use it for all devices in family...
Altera_ForumHonored Contributor
Honored ContributorFor a copper based Ethernet the PHY can't be created inside the FPGA because it has an analog driver part that you can't reproduce with the FPGA hardware.
For an optical connection, you need first to check what kind of signal standard the optical driver is using, to see if it is compatible with the available I/O standards on the FPGA. If this works you shouldn't have any problem implementing the transmission part in HDL. I'm not so sure about the receiving part, especially the clock recovery process. I don't really know the optical Ethernet specification so I can't help you on that one.
