phase problem about transceiver of stratix ii GX

I instantiated five transmitter channels using alt2gxb module. Four of them are in the same quad.

I don't need to remove the phase difference between channels, I just want to get a fixed difference. Now the situation is like this, say the time difference between the serial output of channel 1 and channel 2 is 4 ns (channel 2 delay 4 ns). if I turn off fpga and reboot it again, this time difference will change to other value, such as 2 ns, and channel 2 may be ahead this time. Every time I reboot FPGA, the time relationship between channels are different, even for the four channel in same quad.

I can understand there are time difference for the output of channels, but I can't understand why this difference change random.

Thanks